論文 - 武田 彩希
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Performance study of monolithic pixel detectors fabricated with FD-SOI technology
Miyoshi T., Arai Y., Ichimiya R., Ikemoto Y., Takeda A.
IEEE Nuclear Science Symposium Conference Record 1702 - 1707 2011年
記述言語:日本語 掲載種別:研究論文(学術雑誌) 出版者・発行元:IEEE Nuclear Science Symposium Conference Record
We are developing monolithic pixel detectors with a 0.2 μm CMOS, fully-depleted silicon-on-insulator (SOI) technology. The substrate is high-resistivity silicon and works as a radiation sensor having p-n junctions. The SOI layer is a 40 nm thick silicon, where readout electronics is implemented. There is a buried oxide (BOX) layer between these silicon layers. We have already done several Multi Project Wafer (MPW) runs by gathering many pixel designs into a photo mask set, and as the results, several types of integration type pixel detectors (INTPIX) were fabricated. In this document, the design concept and performance in some of INTPIX detectors are described. © 2011 IEEE.
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Nakashima S., Ryu S.G., Tsuru T.G., Arai Y., Takeda A., Nakajima H., Tsunemi H., Doty J.P., Imamura T., Ohmoto T., Maeda T., Iwata A.
IEEE Nuclear Science Symposium Conference Record 1201 - 1203 2011年
記述言語:日本語 掲載種別:研究論文(学術雑誌) 出版者・発行元:IEEE Nuclear Science Symposium Conference Record
We have been developing a novel X-ray astronomy detector combined with a CMOS readout circuit on a monolithic chip using the SOI CMOS technology. As a part of the development, we have fabricated a prototype of an analog-to-digital converter (ADC) component aiming for building it into the detector itself. We used the OKI 0.2 μm CMOS fully depleted Silicon-On-Insulator process. The prototype ADC consists of a pre-amplifier and two delta-sigma (ΔΣ) modulators. The two modulators process a series of analog input signal alternately to improve the readout speed (∼100 kHz), and output the digital bit-stream signal. An external Field Programmable Gate Array works as a decimation filter and converts the bit-stream signal into a 12-bit digital signal. We evaluated the prototype ADC and obtained the first results as follows: the power consumption of 40 mW, the equivalent input noise of ∼80 μV rms, and the integral non-linearity of less than 0.8%. © 2011 IEEE.
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Development of FD-SOI monolithic pixel devices for high-energy charged particle detection
Hara K., Shinsho K., Ishibashi T., Arai Y., Miyoshi T., Ikemoto Y., Ichimiya R., Tsuboyama T., Kohriki T., Yasu Y., Onuki Y., Ono Y., Katsurayama H., Takeda A., Hanagaki K.
IEEE Nuclear Science Symposium Conference Record 1045 - 1050 2011年
記述言語:日本語 掲載種別:研究論文(学術雑誌) 出版者・発行元:IEEE Nuclear Science Symposium Conference Record
Monolithic pixel devices fabricated with a siliconon-Insulator (SOI) technology are excellent candidates to realize particle detectors of fast response and least material yet simple in fabrication. In our SOI pixel devices the sensitive part is the "handle" wafer, to which we examined high resistive FZ wafers of both p- and n-types together with CZ wafer of n-type. Full depletion of the FZ wafers is easily achievable for typical thicknesses of 260 to 500 μm. We thinned these devices to 100 to 50 μm. The response was evaluated with infrared and red lasers, and in a high energy beam. Irradiation to 60Co γ was carried out to verify the radiation tolerance of the devices. © 2011 IEEE.
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Development of X-ray imaging spectroscopy sensor with SOI CMOS technology
Ryu S., Tsuru T., Nakashima S., Arai Y., Takeda A., Miyoshi T., Ichimiya R., Ikemoto Y., Takashima R., Imamura T., Ohmoto T., Iwata A.
IEEE Nuclear Science Symposium Conference Record 43 - 48 2010年12月
記述言語:日本語 掲載種別:研究論文(学術雑誌) 出版者・発行元:IEEE Nuclear Science Symposium Conference Record
We have been developing a monolithic active pixel sensor with the 0.2 m Silicon-On-Insulator (SOI) CMOS technology, i.e. SOIPIX, for the X-ray imaging spectroscopy on future astronomical satellites. SOIPIX includes a thin CMOS readout layer and a thick high-resistivity Si-sensor layer vertically on a single chip, which would provide advantages in capabilities of direct and flexible readout circuitries over charge-coupled device (CCD). We have built INTPIX2/3 (2008/2009) and XRPIX1(2010). We successfully confirmed the capability of X-ray imaging and spectroscopy in a photon-counting mode by irradiating INTPIX2/3 with monochromatic X-rays. To reduce the readout noise, we designed and built XRPIX1, which has a correlated double sampling (CDS) readout circuit in each pixel to suppress the reset noise. We obtained an energy resolution of FWHM 1.5 keV(7%)@22 keV with XRPIX1 cooled at 50 degree. Moreover, XRPIX1 offers intra-pixel hit trigger and one-dimensional hit-pattern outputs. We also confirmed the trigger capability by irradiating a single pixel of XRPIX1 with laser light. © 2010 IEEE.
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Development of INTPIX and CNTPIX Silicon-On-Insulator monolithic pixel devices
Hara K., Kochiyama M., Koike K., Sega T., Shinsho K., Arai Y., Fujita Y., Ichimiya R., Ikegami Y., Ikemoto Y., Kohriki T., Miyoshi T., Tauchi K., Terada S., Tsuboyma T., Unno Y., Horii Y., Onuki Y., Nio D., Takeda A., Hanagaki K., Uchida J., Tsuru T., Ryu S., Kurachi I., Kasai H., Kuriyama N., Miura N., Okihara M., Motoyoshi M.
Proceedings of Science 113 2010年
記述言語:日本語 掲載種別:研究論文(学術雑誌) 出版者・発行元:Proceedings of Science
© Copyright owned by the author(s) under the terms of the Creative Commons Attribution-NonCommercial-ShareAlike Licence. We are developing monolithic pixel detectors utilizing a silicon-on-insulator (SOI) process commercially provided by OKI Semiconductor. Two main pixel sensors, INTPIX and CNTPIX, are being designed as signal integration and counting type devices, respectively. We describe the fabrication results including a buried p-well (BPW) technology recently adopted. The BPW is a breakthrough suppressing the back-gate effect. The radiation resistance of the BPW was also investigated. The ultimate solution to the back-gate effect suppression is stacking of two SOI wafers. We are investigating a 3D process. We also describe the successful results of thinning the wafer to 100μm.